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Eliyan
San Francisco, CA, United States
Physical Design Engineer ON-SITE (SANTA CLARA) Join the leading chiplet startup! As an Eliyan Physical Design Engineer, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will be defining, implementing
Job Source: EliyanForward
San Francisco, CA, United States
Forward is on a bold mission to make high-quality healthcare available to a billion people across the globe. We’re building the world’s most advanced healthcare platform from the ground up, combining hardware, software, and doctors under one roof. Forward was founded in January 2016 by former executives and engineering leaders from Google and Uber.
Job Source: Forwardquadric.io, Inc
Burlingame, CA, United States
Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture. Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads in a wide variety of edge and endpoint devices, ranging from battery operated smart-sensor systems to high-performance automotive or autonomous vehicle
Job Source: quadric.io, IncQuadric
Burlingame, CA, United States
Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture. Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads in a wide variety of edge and endpoint devices, ranging from battery operated smart-sensor systems to high-performance automotive or autonomous vehicle
Job Source: QuadricSemiconductor Engineering
Burlingame, CA, United States
Home >Jobs > Physical Design Methodology Engineer As a member of our physical design methodology team you will be tasked with developing physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. For additional details and the most recent updates, hit “Apply for job” This website uses co
Job Source: Semiconductor EngineeringSquare Inc.
Oakland, CA, United States
Block is one company built from many blocks, all united by the same purpose of economic empowerment. The blocks that form our foundational teams — People, Finance, Counsel, Hardware, Information Security, Platform Infrastructure Engineering, and more — provide support and guidance at the corporate level. They work across business groups and around
Job Source: Square Inc.Femtosense
San Bruno, CA, United States
We build chips and AI algorithms for AI inference in edge devices with best-in-class energy consumption, area, speed, and cost. Our systems are based on a distributed, near-memory-compute architecture and sparse mathematics acceleration. End consumer products incorporating our technology include hearables, smart home appliances, security and enviro
Job Source: FemtosensePayScale, Inc.
San Mateo, CA, United States
The average salary for a Design Engineer is $72,461 in 2023 $56k - $105k Bonus $956 - $10k Profit Sharing $582 - $10k Total Pay $53k - $107k Based on 7,454 salary profiles (last updated Aug 16 2023) Is Average Design Engineer Salary your job title? Find out what you should be paid Use our tool to get a personalized report on your market worth. What
Job Source: PayScale, Inc.San Francisco, CA, United States
Synapse Design has an exciting opportunity for a Physical Design Engineer to help lead our growing Physical Design Engineering team. We are looking for an experienced engineer. Seniority Level - Mid-Senior level
Industry - Semiconductors
Employment Type - Full-time
Responsibilities: 5+ years of industry experience required
Skill Set: BS or above in electrical engineering or computer engineering
Experience with Hierarchical design is a plus
Experience with ICC2 or Innovus
Experience in taping out multiple technologies is a plus
Expertise in floorplanning large blocks or chip
Expertise in power grid design
Expertise in clock design and CTS
Expertise in low power flow (power gating, multi-Vt, voltage islands, dynamic voltage scaling, body biasing, etc) is a plus
Hands-on experience with STA, DRC/LVS, LEC
Experience in IR drop analysis is a plus
Programming experience in Tcl, and Perl is a plus
Involvement in flow development is a plus
If you’d like to discuss this opportunity in greater detail, send me a contact phone number and time to reach you. Or feel free to contact me at +1 (661) 414-0863.
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Physical Design Engineer jobs in San Francisco, CA, United States
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