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HDR
San Jose, CA, United States
Position: Project Manager Location: Milpitas, CA Duration: 1 Year Job Description: We are seeking a highly organized and detail-oriented Project Coordinator to join our team. The Project Coordinator will be responsible for planning, organizing, and coordinating project activities to ensure successful project delivery. The ideal candidate will
Job Source: HDRCadence Design Systems, Inc.
San Jose, CA, United States
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The Cadence Compute Systems Group (CSG) develops and licenses IP for system designs. This includes CPUs and high-performance DSPs, DDR and IO controllers, hardware accelerators, and subsystems. Our IP designs are used by most of the top se
Job Source: Cadence Design Systems, Inc.Aerospike Inc
Mountain View, CA, United States
At Aerospike, we dream big. Our focus is helping companies tackle seemingly insurmountable problems and doing what’s never been done before. That is why we developed the world's leading real-time data platform that powers mission-critical applications at the world's most innovative, category disrupting companies. Our customers have deployed extreme
Job Source: Aerospike IncCadence Design Systems
San Jose, CA, United States
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The Cadence Compute Systems Group (CSG) develops and licenses IP for system designs. This includes CPUs and high-performance DSPs, DDR and IO controllers, hardware accelerators, and subsystems. Our IP designs are used by most of the top sem
Job Source: Cadence Design SystemsTPS Talent
Santa Clara, CA, United States
Job Description Job Description TITLE: Architect - RF Hardware Design DIRECT HIRE LOCATION: MUST BE LOCATED IN Santa Clara, CA (Bay Area) - IN OFFICE JOB - NO REMOTE OR HYBRID OFFICE HOURS: Health Benefits: Medical (Cigna and Kaiser) HSA FSA Dental MetLife Vision Metlife 401K STD LTD Life Additional voluntary plans available as well. Jo
Job Source: TPS TalentMidas Consulting
Santa Clara, CA, United States
Title: Technical Architect - Hardware Design Location: Santa Clara, CA (On-site) Client: Quest Global/Client Salary/Rate:$130-140k/year or $70-80/hour C2C Required Skills: Technical Should know Product development workflow especially Hardware design & development. Should have experience in FPGA design and development (VHDL & Verilog) Should ha
Job Source: Midas ConsultingCadence Design Systems, Inc.
San Jose, CA, United States
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Design Engineering Architect Embedded Software (San Jose USA) Job Description: The Cadence Compute Systems Group (CSG) develops and licenses IP designs for SoC and ASIC systems. This includes CPUs and high-performance DSPs, DDR and Inte
Job Source: Cadence Design Systems, Inc.Apple Inc.
Cupertino, CA, United States
Apple Mixed Signal Design team is seeking a very creative software architect to help change the way we design our Analog Mixed-Signal IPs. These IPs will power our next-generation mobile silicon, including future versions of our iPhone, iPad, and Apple Watch devices. Examples of our AMS IPs include SERDES for data communication, PLLs for clock gene
Job Source: Apple Inc.San Jose, CA, United States
The Cadence Compute Systems Group (CSG) develops and licenses IP for system designs. This includes CPUs and high-performance DSPs, DDR and IO controllers, hardware accelerators, and subsystems. Our IP designs are used by most of the top semiconductor vendors today, and our customers are shipping billions of chips annually using our components.
The CSG Central Applications Engineering team seeks an experienced and talented SoC Design Manager to lead a new team for CSG systems. In this role, you will be responsible for managing a team of hardware design engineers to develop and validate reference systems for Computer Vision, Machine Learning, Radar, Automotive, and other high-performance applications. This is a technically rewarding role with high visibility within the organization. The team is responsible for supporting customers of CSG subsystems. The group will implement reference designs on emulation systems and support applications for product demonstrations.
This is a hands-on management role that requires technical expertise in implementing SoC and compute-based systems. The role requires good experience in management, project planning, and quality development. You will work closely with compute and interface IP development engineering, and build designs to demonstrate the capabilities of CSG subsystems and components.
Key Responsibilities
Build, manage, and mentor a team of hardware design engineers, providing guidance, support, and opportunities for professional growth.
Collaborate with cross-functional teams, including software and IP teams, to ensure seamless integration and alignment on hardware and software components.
Develop reference designs, collateral, and training material for CSG system customers. Build and train an organization to support users.
Identify and implement best practices in hardware design, testing, and validation to improve efficiency and reliability. Stay up to date with latest industry trends, technologies, and design methodologies, and incorporate them into team’s workflows.
Skills
Must have at least 4 years of experience in managing ASIC design, integration, or verification teams.
Must have expertise in any of the following domains: processor design, on-chip communication and interconnects, high-speed interfaces, or chiplets.
Expertise in Verilog/System Verilog for coding and verification.
Proficiency in RTL design techniques, including synthesis, timing closure, and verification.
Experience in using UVM for functional verification of ASIC designs.
Experience with EDA tools like Cadence and Synopsys for design simulation and verification.
Extensive experience with FPGA emulation, design tools, and verification.
BS in EE/CS with 10+ years work experience, or MS in EE/CS with 8+ years experience.
Some travel (up to 15% of time) may be required.
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Design Architect jobs in San Jose, CA, United States
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