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Northrop Grumman
San Diego, CA, United States
Requisition ID: R Category: Engineering Location: San Diego, California, United States of America Clearance Type: Secret Telecommute: No- Teleworking not available for this position Shift: 1st Shift (United States of America) Travel Required: Yes, 10% of the Time Relocation Assistance: Relocation assistance may be available At Northrop Gr
Job Source: Northrop GrummanNorthrop Grumman
San Diego, CA, United States
Location: San Diego, California, United States of America Clearance Type: Secret Telecommute: No- Teleworking not available for this position Shift: 1st Shift (United States of America) Travel Required: Yes, 10% of the Time Relocation Assistance: Relocation assistance may be available At Northrop Grumman, our employees have incredible o
Job Source: Northrop GrummanNorthrop Grumman Corp. (AU)
San Diego, CA, United States
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atla
Job Source: Northrop Grumman Corp. (AU)InnoPhase IoT
San Diego, CA, United States
Job Description: As a Principal/Sr. Staff Digital Design Engineer, you will be working with a team of design engineers to develop novel SoC products for connectivity and communications. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. In addition to deli
Job Source: InnoPhase IoTCyberCoders
San Diego, CA, United States
Position Overview: The Digital Design Engineer will specialize in SOC Architecture, RTL, Logic Design, and Verification. The engineer will be expected to develop, debug, and maintain digital designs, and help ensure that all designs meet their technical specifications. The engineer should also be proficient in Verilog, SystemVerilog, ATPG, Fault G
Job Source: CyberCodersTrellisWare Technologies, Inc
San Diego
Job Description Job Description TrellisWare launched in 2000 with an innovative culture striving to push technological boundaries in the area of wireless communications. We are now a worldwide leader in highly advanced algorithms, waveforms, and communications systems that range from small form factor radio products to fully integrated solutions.
Job Source: TrellisWare Technologies, IncApple, Inc.
San Diego, CA, United States
Summary Posted: Sep 29, 2023 Role Number: 200507309 Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what's considered feasible? As part of our team, you'll craft sophisticated digital baseband logic design in groundbreaking cellular ICs that deliver more performance in our products than ever! You'll
Job Source: Apple, Inc.Apple Inc.
San Diego, CA, United States
Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what’s considered feasible? As part of our team, you’ll craft sophisticated digital baseband logic design in groundbreaking cellular ICs that deliver more performance in our products than ever! You’ll work across different fields to transform improved har
Job Source: Apple Inc.San Diego, CA, United States
As a Staff Engineer, Digital Design, you will be working with a team of design engineers to develop novel 5G ORAN SoC products for connectivity and wireless communications. You will be contributing to micro-architecture and design of digital functional blocks based on product requirements. In addition to delivering high-quality digital solutions in the context of the product architecture, the team supports other disciplines with work products such as Verilog stimulus files, test benches for device bring-up/characterization, test vectors for product manufacturing, etc.
This is a full-time position in San Diego, CA or Irvine, CA.
Key Responsibilities
Design and integrate SERDES controller, PCS, PMA functional blocks
Micro code development for network processor
Network processor architecture, throughput analysis and optimization
Front-to-back ASIC digital design and verification – RTL through physical implementation
Define & review synthesis constraints for functional blocks
Functional issues debugging and timing closure issues debugging
Work with System, Software, RF, Analog, and Test teams and provide the necessary support
Job Requirements
MS/Ph.D. EE/CS preferred
10 or more years of experience in digital SoC development required
Industrial design experiences PCIE/JESD/Ethernet controller & PCS and respective SERDES PHY digital (PMA)
Strong knowledge on CPU bus protocols and designs such as AXI/AHB/APB and DMA
Solid design skill in Verilog / SystemVerilog RTL for complex SOC functional blocks in network products
Solid experience in static timing analysis, defining timing constraints and exceptions
Proficient in (Verilog/VHDL) and SystemVerilog RTL coding, LINT, CDC checking
Experience in using Synopsys CoreConsultant IP generation tools is a plus
Experience bringing highly integrated mixed-signal SoCs to commercial mass production
Experience with embedded systems, wireless protocols, power management, signal processing, and standard digital interfaces
Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques
Knowledge of languages such as C/C++, Perl, Tcl, and Python
Strong communication and presentation skills
Team player with a strong sense of urgency to complete projects on time
Desirable Skills
Experience with Cadence F2B design tools
Experience with formal verification tools
Able to work effectively with incomplete or changing requirements
Strong knowledge of mixed-signal concepts
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Staff Engineer, Digital Design jobs in San Diego, CA, United States
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