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Intel Corporation
Austin, TX, United States
Design Verification Engineer page is loaded Design Verification Engineer Apply locations US, Texas, Austin time type Full time posted on Posted 2 Days Ago job requisition id JR0257198 Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else
Job Source: Intel CorporationUrsus Inc
Austin, TX, United States
JOB TITLE: Design Verification Engineer LOCATION: Austin, TX DURATION: 1 year PAY RANGE: $90 - $120/hr TOP SKILLS: • Current state-of-the-art testbench development such as UVM methodology • Experience in design verification with UVM and SystemVerilog is a MUST • 5-15 year's industry experience in a design verification role. COMPANY: Our client, a
Job Source: Ursus IncApple, Inc.
Austin, TX, United States
Summary Posted: Mar 4, 2024 Role Number: 200455268 Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no tel
Job Source: Apple, Inc.Apple Inc.
Austin, TX, United States
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for an unusually hardworking design verification engineer. As a member of our multifaceted group, you will have the rare and great opportunity to craft u
Job Source: Apple Inc.Mastech Digital
Austin, TX, United States
Job Title : Design Verification Engineer Location: Austin, TX Requirements • 5-15 year’s industry experience in a design verification role. • Proficient in System Verilog/UVM/OVM, OOP/C++ • Knowledge of GPU, experience with Shader, Texture, or Memory System a plus • Experience with code coverage and functional coverage driven verification method
Job Source: Mastech DigitalIntel GmbH
Austin, TX, United States
Job Description Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are buil
Job Source: Intel GmbHBayone
Austin, TX, United States
- Local to Austin Market - No H1B candidate - Top 2 candidates per suppliers As a member of our System IP team you will contribute to the functional verification of System IP including coherent interconnect, and executing Test plan. Work with DV team and designers to build verification environments. Develop UVM sequences, tests, scoreboards, monit
Job Source: BayoneCorrect Designs
Austin, TX, United States
Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct Designs is currently seeking talented Verification Engineers with prior System Verilog UVM experience to work with our major clients both in Austin,
Job Source: Correct Designsaustin, tx
Job Title : Design Verification Engineer
Location: Austin, TX
Requirements
• 5-15 year’s industry experience in a design verification role.
• Proficient in System Verilog/UVM/OVM, OOP/C++
• Knowledge of GPU, experience with Shader, Texture, or Memory System a plus
• Experience with code coverage and functional coverage driven verification methodology.
• Experience in creating, running and debugging of SystemVerilog/UVM constraint-random Testbench.
• Excellent working knowledge of scripting languages such as Python or Perl.
• Understanding of micro-architecture, logic design, FSMs, arithmetic datapath pipelines.
• Strong functional verification experience including Test planning, Testbench Architecture, Test/Coverage Model/Assertion Development.
• Strong debugging skills
• Strong programming skills with good understanding of algorithms and data structures
• Good verbal and written communication skills.
Recruiter Name: Divya Mishra
Recruiter Phone: +1 412 684 6384 or +1 203.678.9801
Recruiter Email Id : [email protected]
Equal Employment Opportunity
#Mastech1
Design Verification Engineer jobs in austin, tx
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