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Intel Corporation
Austin, TX, United States
Design Verification Engineer page is loaded Design Verification Engineer Apply locations US, Texas, Austin time type Full time posted on Posted 2 Days Ago job requisition id JR0257198 Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else
Job Source: Intel CorporationApple, Inc.
Austin, TX, United States
Summary Posted: Mar 4, 2024 Role Number: 200455268 Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no tel
Job Source: Apple, Inc.Ursus Inc
Austin, TX, United States
JOB TITLE: Design Verification Engineer LOCATION: Austin, TX DURATION: 1 year PAY RANGE: $90 - $120/hr TOP SKILLS: • Current state-of-the-art testbench development such as UVM methodology • Experience in design verification with UVM and SystemVerilog is a MUST • 5-15 year's industry experience in a design verification role. COMPANY: Our client, a
Job Source: Ursus IncMastech Digital
Austin, TX, United States
Job Title : Design Verification Engineer Location: Austin, TX Requirements • 5-15 year’s industry experience in a design verification role. • Proficient in System Verilog/UVM/OVM, OOP/C++ • Knowledge of GPU, experience with Shader, Texture, or Memory System a plus • Experience with code coverage and functional coverage driven verification method
Job Source: Mastech DigitalApple Inc.
Austin, TX, United States
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for an unusually hardworking design verification engineer. As a member of our multifaceted group, you will have the rare and great opportunity to craft u
Job Source: Apple Inc.Correct Designs
Austin, TX, United States
Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct Designs is currently seeking talented Verification Engineers with prior System Verilog UVM experience to work with our major clients both in Austin,
Job Source: Correct DesignsBayone
Austin, TX, United States
- Local to Austin Market - No H1B candidate - Top 2 candidates per suppliers As a member of our System IP team you will contribute to the functional verification of System IP including coherent interconnect, and executing Test plan. Work with DV team and designers to build verification environments. Develop UVM sequences, tests, scoreboards, monit
Job Source: BayoneIntel GmbH
Austin, TX, United States
Job Description Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are buil
Job Source: Intel GmbHAustin, TX, United States
Job Description Job Description Job Summary
We invite you to join our highly motivated team of consultants, providing clients with the very best in verification. You will be exposed to a diverse range of designs and application areas. We work on leading edge Audio, Automotive, Comms, Processors, Space, Video and more.
You will have the opportunity to travel, present at conferences, win Best Paper awards, or get involved with industry standards. We do it all. In addition to being good, we like to be seen to be good.
As a permanent full-time employee of Verilab, you will be responsible for all aspects of verification planning, management and implementation. You will be directly involved with helping build and grow client relationships.
You will be working alongside some of the smartest people in the industry. Verilab is a company where your skills will be tested, nurtured, and where your contribution makes a difference.
Key Qualifications
BSc/MSc in Electronic Engineering, Computer Engineering, or Computer Science.
7 years of project-proven verification experience.
Experienced SystemVerilog/UVM developer: Block and integration-level
Coverage-driven, self-checking verification environments from scratch
High-level sequence-based stimulus
Complex transaction-based checkers (e.g. scoreboards with data translation and ordering)
Register models
Specification level checks for several different protocols, e.g. AXI, DDRx, PCIe, USBx.
Verification planning: Requirements capture and traceability
Estimation, prioritizing
Metrics used to determine verification closure
Ownership of work, from planning to implementation.
Experience dealing directly with strict deadlines and technical challenges.
Effective communication and collaboration with others.
Other Interesting Qualifications
Specman/e expertise to a similar level.
C/C++ developing, or integrating, reference models into SystemVerilog/UVM environments.
Formal Verification: Formal Property Verification, Proof Kits.
Experience leading a technical team, including mentoring, training, and performing technical peer reviews.
Embedded programming for ARM, or GPU processors.
Python or Perl.
Verilab is an established international professional services firm of verification experts. Founded in 2000, we specialize in solving the toughest functional verification problems for ASIC, FPGA and independent IP development. Our work ranges from rescuing projects struggling with verification, through sophisticated verification IP development, to complete methodology engineering. We innovate, implement, manage and coach.
Benefits
Full-time permanent employee with competitive salary.
20 days paid vacation and observed holidays.
401k Matching up to 6%.
Medical, dental, vision, term life, AD&D, and disability (100% of all premiums covered by Verilab).
Eligibility for bonuses.
Birthday gifts.
Book budget.
Leading industry career and personal development training.
Additional Requirements
All candidates must be eligible to work in the United States.
The ability to travel is required.
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Design Verification Engineer jobs in Austin, TX, United States
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